Home www.play-hookey.com Mon, 10-26-2020
| Direct Current | Alternating Current | Semiconductors | Digital | Logic Families | Digital Experiments | Computers |
| Analog | Analog Experiments | Oscillators | Optics | HTML Test |
| Combinational Logic | Sequential Logic | Alternate Flip-Flop Circuits | Counters | Registers | The 555 Timer |
| D Flip-Flop Using NOR Latches | D Flip-Flop Using NAND Latches | CMOS Flip-Flop Construction |

CMOS Flip-Flop Construction

CMOS technology allows a very different approach to flip-flop design and construction. Instead of using logic gates to connect the clock signal to the master and slave sections of the flip-flop, a CMOS flip-flop uses transmission gates to control the data connections. (See the CMOS gate electronics page for a closer look at the transmission gate itself.)

The result is that a controllable flip-flop can be built with only inverters and transmission gates — a very small and simple structure for an IC.

The basic CMOS D flip-flop is shown below.

Edge-triggered D NAND flip-flop

Prev: D Flip-Flop Using NAND Latches Next: Counters

All pages on www.play-hookey.com copyright © 1996, 2000-2015 by Ken Bigelow
Please address queries and suggestions to: webmaster@play-hookey.com